EMC Compliant PCB Design: How to Pass Testing First Time

EMC compliant PCB design is decided at layout, not at the test lab. By the time a board fails an emissions scan, most of the cheap fixes are already unavailable.

This article covers the decisions that matter, roughly in the order you make them.

Why boards fail

Almost all radiated emissions failures trace back to one of three causes.

A broken return path. Current returns to its source through the path of least impedance, which at high frequency means directly beneath the signal trace. Interrupt that path and the return current detours, forming a loop that radiates.

Cables acting as antennas. Common mode current on an attached cable turns a 200 mm USB lead into an efficient radiator. This is the single most common cause of failure in products with external connections.

Switching regulator harmonics. A buck converter switching at 1 MHz produces content well into the hundreds of megahertz. Poor loop layout turns that into radiated energy.

Stackup comes first

The stackup decides your ceiling before you place a single component.

Two layer boards are difficult. Without a dedicated ground plane, return paths are uncontrolled. Two layer designs can pass, but they require far more care and leave far less margin.

Four layers is the practical minimum for anything with a fast processor or a radio. Signal, ground, power, signal is a reasonable default. The key property is that every signal layer is adjacent to a solid plane.

Keep the dielectric between signal and its reference plane thin. A closer plane means a tighter return path and a smaller loop area. This costs nothing at fabrication.

Ground plane discipline

Treat the ground plane as a resource you protect rather than a layer you route through.

• Never split a ground plane under a signal that crosses the split
• Avoid routing traces on the ground layer, since each one carves a slot the return current must go around
• If you must cross a plane split, place stitching capacitors at the crossing to give the return current a path
• Stitch grounds between layers with vias liberally, particularly around connectors, radios and switching regulators

A slot in a ground plane is a slot antenna. It does not matter that you did not intend it as one.

Switching regulator layout

The hot loop is the path carrying the highest rate of current change. In a buck converter it runs from the input capacitor, through the high side switch, through the low side switch and back.

Minimize its physical area. That means:

• Input capacitor as close to the IC as physically possible, on the same layer
• A solid ground plane directly beneath the regulator
• Short, wide connections rather than long thin ones
• The switch node kept small in area, since it is the noisiest net on the board

The switch node is a trade off. It needs enough copper for current but every extra square millimetre radiates. Keep it just large enough.

Filtering at connectors

Every cable leaving the board is a potential antenna. Filter at the point of exit.

• Common mode chokes on differential pairs such as USB and Ethernet
• Ferrite beads plus capacitors on power and low speed signals
• Transient protection close to the connector, not deep in the board
• A local ground stitching area around the connector shell

The filter must be at the connector. A ferrite bead 30 mm inside the board leaves 30 mm of trace radiating before it does anything.

Crystal and clock placement

Clock sources produce narrow, tall peaks in an emissions scan, and those are the ones that fail.

• Place the crystal immediately adjacent to its IC pins
• Surround it with a ground pour, stitched to the plane below
• Keep clock traces short and never route them near board edges or under connectors
• Add a series resistor on clock outputs to slow the edge rate where timing allows

Slower edges radiate less. If a signal does not need a 1 ns rise time, do not give it one.

Radio coexistence

If the board contains a transmitter, EMC and RF performance pull in opposite directions.

Keep the RF section physically separated with its own clean ground area, stitched to the main ground at a single controlled region. Route switching regulators away from the antenna keepout. Verify that your harmonics fall within limits at full transmit power, not at a nominal setting.

Low pass filtering after the power amplifier is usually necessary. See our guide on impedance matching network design for component choices and footprint placement.

Pre-compliance testing saves money

A full accredited EMC test is expensive and slow. A near field probe and a spectrum analyzer on your own bench cost a fraction and catch most problems.

Scan the board, find the hot spots, correlate them to nets, and fix them before you book the chamber. A first time pass is worth several times what the probe set costs.

What is still fixable after a failure

If you have already failed, in rough order of cost:

1. Add ferrites or shield cans to existing footprints 2. Slow edge rates in firmware where possible 3. Add filtering at cable exits, sometimes possible with an inline assembly 4. Reduce clock frequencies or enable spread spectrum on the regulator 5. Respin the board

Options one through four are why leaving unpopulated footprints for filtering is good practice even when you think you will not need them.

Getting it right before the chamber

EMC compliant PCB design is mostly discipline applied early. Almost every fix is cheap at layout and expensive afterwards.

SRQ Robotics designs mixed signal and RF boards with EMC in mind from the stackup onward, including pre-compliance scanning before formal testing. Learn more about our PCB design services or contact us if you have a board that needs to pass first time.